Deming Chen's Research Activities
Research Interests
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Synthesis and architecture exploration for programmable logic devices
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CAD for multicore and SoC under process variation
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Reconfigurable computing
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Nanoscale IC design and CAD
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High-level synthesis (Behavior synthesis)
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Design space exploration for SoC
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Algorithmic design and applications
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Research In a Nutshell
Deming Chen's research focuses on computer-aided design techniques for emerging systems. The major projects include: 1) nano-centric design methodology for nanoFPGAs that targets novel modeling, patterning, synthesis, and architecture building for nanoscale reconfigurable circuits; 2) microarchitecture and SoC design considering PVT (process, voltage, temperature) variations, including variation-aware behavior synthesis, variation-aware physical design and clock-tree synthesis, timing speculation for high performance, and thermal-aware architecture design; 3) power reduction through novel CAD techniques dealing with a wide range of issues, such as glitch power reduction, leakage power reduction, and power modeling with process variation, etc.; 4) compilation of designs in high-level parallel languages to hardware implementation on either multi-core ASIC or FPGA; and 5) reconfigurable computing, including either building new coarse-level reconfigurable architectures or carrying out FPGA implementation of software algorithms to accelerate compelling and computation-intensive applications.
Some Ongoing Projects for High-level Synthesis
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Behavior synthesis for domain-specific architecture
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Behavior synthesis under process variation
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Scheduling and binding for dynamic power reduction
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Some Ongoing Projects for FPGA Design and CAD
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nanoFPGA architecture and CAD (e.g., 3D CMOS/Nanomaterial FPGA, nanotube-based FPGA)
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Physical design for dynamic power reduction
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Synthesis for multi-clock domains and variation-aware synthesis
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Some Ongoing Projects for Microprocessor, Multicore and SoC
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CAD for multicore chip and SoC with parameter variation
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Reconfigurable high-performance computing
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Design and synthesis for ASIP
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Some Ongoing Projects for Parallel Compilation Flow
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CUDA to FPGA
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C to application-specific multicore design
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Research Grants
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