Address:

Coordinated Science Laboratory
University of Illinois at Urbana-Champaign
1308 West Main Street
Urbana, IL 61801-2307
USA
Tel: +1 (217) 244-0041
Fax: +1 (217) 244-1946
Email: shanbhag@illinois.edu

 

     Professor Naresh Shanbhag


Research Theme:

Design and implementation of robust, low-power and high-performance integrated circuits and systems for signal processing and communications.

See VLSI Information Processing Systems (ViPS) Research Group Home page for details.

Teaching:


Brief Bio:

Naresh R. Shanbhag received his Ph.D. degree in EE from the University of Minnesota in 1993. From July 1993 to August 1995, he worked in AT&T Bell Laboratories at Murray Hill , New Jersey , where he was responsible for the development of VLSI algorithms, architectures and implementation of broadband data communications transceivers. In particular, he was the lead chip architect for AT&T's 51.84 Mb/s transceiver chips over twisted-pair wiring for Asynchronous Transfer Mode (ATM)-LAN and very high-speed digital subscriber line (VDSL) chip-sets. Since August 1995, he is with the Department of Electrical and Computer Engineering, and the Coordinated Science Laboratory where he is presently a Professor.

Dr. Shanbhag's research focuses on two major areas: the design of VLSI chips for broadband communications and the design of energy-efficient and reliable VLSI chips employing communication system design principles. He has published more than 90 journal articles/book chapters/conference publications in this area and holds three US patents. He is also a co-author of the research monograph Pipelined Adaptive Digital Filters published by Kluwer Academic Publishers in 1994.

Dr. Shanbhag received the 2006 IEEE Journal of Solid-State Circuits Best Paper Award, became a Fellow of IEEE in 2006, received the 2001 IEEE Transactions on VLSI Best Paper Award, the 1999 IEEE Leon K. Kirchmayer Best Paper Award, the 1999 Xerox Faculty Award, 2007 Distinguished Lecturership of IEEE Circuits and Systems Society, the National Science Foundation CAREER Award in 1996, and the 1994 Darlington Best Paper Award from the IEEE Circuits and Systems Society.  

From 1997-99 and from 1999-2002, he served as an Associate Editor for the IEEE Transaction on Circuits and Systems: Part II and the IEEE Transactions on VLSI, respectively.  He is currently serving on the technical program committees of major international conferences such as the International Solid-State Circuits Conference (ISSCC, wireline communications subcommittee), the International Conference on Computer-Aided Design (ICCAD, chair: Reliable and Alternative Systems subcommittee), the International Symposium on Low-Power Design (ISLPED, chair: System design), the International Conference on Acoustics, Speech and Signal Processing (ICASSP), the IEEE Signal Processing Systems Workshop (SiPS), and the International Symposium on Circuits and Systems (ISCAS). He is leading the Alternative Computational Models research theme in the Gigascale Systems Research Center (GSRC) since 2006.

Dr. Shanbhag is a co-founder (along with Dr. Singer) and Chief Technology Officer of Intersymbol Communications, Inc., a venture-funded fabless semiconductor start-up that provides mixed-signal ICs for electronic dispersion compensation for optical links. Intersymbol Communications, Inc., was acquired by Finisar Corporation in 2007, where Dr. Shanbhag also serves as a Sr. Scientist on a part-time basis.


Maintained by N. Shanbhag (Last updated:31 July 2008)